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1.2 Define the two main categories of processor registers.
1.3 In general terms, what are the four distinct actions that a machine instruction can specify?
1.4 What is an interrupt?
1.5 How are multiple interrupts dealt with?
1.10 In general, what are the strategies for exploiting spatial locality and temporal locality?
Problems (10 points each)
1.2 The program execution of Figure 1.4 is described in the text using six steps. Expand this
description to show the use of the MAR and MBR.
1.3 Consider a hypothetical 32-bit microprocessor having 32-bit instructions composed of two
fields. The first byte contains the opcode and the remainder an immediate operand or an
operand address.
a. What is the maximum directly addressable memory capacity (in bytes)?
b. Discuss the impact on the system speed if the microprocessor bus has

  1. a 32-bit local address bus and a 16-bit local data bus, or
  2. a 16-bit local address bus and a 16-bit local data bus.
    c. How many bits are needed for the program counter and the instruction register?
    1.5 Consider a 32-bit microprocessor , with a 16-bit external data bus, driven by an 8-MHz input
    clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four
    input clock cycles. What is the maximum data transfer rate across the bus that this
    microprocessor can sustain in bytes/s? To increase its performance, would it be better to make
    its external data bus 32 bits or to double the external clock frequency supplied to the
    microprocessor? State any other assumptions you make and explain. Hint: Determine the
    number of bytes that can be transferred per bus cycle.
    1.7 In virtually all systems that include DMA modules, DMA access to main memory is given
    higher priority than processor access to main memory. Why?
    1.8 A DMA module is transferring characters to main memory from an external device
    transmitting at 9600 bits per second (bps). The processor can fetch instructions at the rate of 1
    million instructions per second. By how much will the processor be slowed down due to the
    DMA activity?

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